PIC18F2331 Datasheet, PDF (201/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
17.7 Dead Time Generators
In power inverter applications where the PWMs are
used in Complementary mode to control the upper and
lower switches of a half-bridge, a dead time insertion is
highly recommended. The dead time insertion keeps
both outputs in inactive state for a brief time. This
avoids any overlap in the switching during the state
change of the power devices due to TON and TOFF
characteristics.
Because the power output devices cannot switch
instantaneously, some amount of time must be pro-
vided between the turn-off event of one PWM output in
a complementary pair and the turn-on event of the
other transistor. The PWM module allows dead time to
be programmed. Following sections explain the dead
time block in detail.
17.7.1 DEAD TIME INSERTION
Each complementary output pair for the PWM module
has a 6-bit down counter used to produce the dead
time insertion. As shown in Figure 17-17, each dead
time unit has a rising and falling edge detector con-
nected to the duty cycle comparison output. The dead
time is loaded into the timer on the detected PWM edge
event. Depending on whether the edge is rising or fall-
ing, one of the transitions on the complementary out-
puts is delayed until the timer counts down to zero. A
timing diagram indicating the dead time insertion for
one pair of PWM outputs is shown in Figure 17-18.
FIGURE 17-17: DEAD TIME CONTROL UNIT BLOCK DIAGRAM FOR ONE PWM OUTPUT PAIR
Dead Time
Select Bits
Zero Compare
FOSC
Dead Time
Prescale
Clock Control
and Prescaler
6-Bit Down Counter
Odd PWM Signal To
Output Control Block
Even PWM Signal To
Output Control Block
Duty Cycle
Compare Input
Dead Time Register
FIGURE 17-18:
DEAD TIME INSERTION FOR COMPLEMENTARY PWM
PDC1
compare
output
td
td
PWM1
PWM0
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 199