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PIC18F2331 Datasheet, PDF (213/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
18.0 SYNCHRONOUS SERIAL PORT
(SSP) MODULE
18.1 SSP Module Overview
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
⢠Serial Peripheral Interface (SPIâ¢)
⢠Inter-Integrated Circuit (I2Câ¢)
An overview of I2C operations and additional informa-
tion on the SSP module can be found in the PICmicro®
Mid-Range MCU Family Reference Manual
(DS33023).
Refer to Application Note AN578, âUse of the SSP
module in the I 2C⢠Multi-Master Environmentâ
(DS00578).
18.2 SPI Mode
This section contains register definitions and opera-
tional characteristics of the SPI module. Additional
information on the SPI module can be found in the
PICmicro® Mid-Range MCU Family Reference Manual
(DS33023A).
SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To accom-
plish communication, typically three pins are used:
⢠Serial Data Out (SDO) â RC7/RX/DT/SDO
⢠Serial Data In (SDI) â RC4/INT1/SDI/SDA
⢠Serial Clock (SCK) â RC5/INT2/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
⢠Slave Select (SS) â RC6/TX/CK/SS
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the
following to be specified:
⢠Master mode (SCK is the clock output)
⢠Slave mode (SCK is the clock input)
⢠Clock polarity (Idle state of SCK)
⢠Clock edge (output data on rising/falling edge of
SCK)
⢠Clock rate (Master mode only)
⢠Slave Select mode (Slave mode only)
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 211
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