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PIC18F2331 Datasheet, PDF (302/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
PIC18F2331/2431/4331/4431
BTFSC
Bit Test File, Skip if Clear
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] BTFSC f,b[,a]
0 ≤ f ≤ 255
0≤b≤7
a ∈ [0,1]
skip if (f<b>) = 0
None
1011 bbba ffff ffff
If bit ‘b’ in register ‘f’ is 0, then the
next instruction is skipped.
If bit ‘b’ is 0, then the next instruction
fetched during the current instruction
execution is discarded, and a NOP is
executed instead, making this a two-
cycle instruction. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read Process Data
register ‘f’
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
FALSE
TRUE
BTFSC
:
:
FLAG, 1
Before Instruction
PC
=
After Instruction
If FLAG<1> =
PC
=
If FLAG<1> =
PC
=
address (HERE)
0;
address (TRUE)
1;
address (FALSE)
BTFSS
Bit Test File, Skip if Set
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] BTFSS f,b[,a]
0 ≤ f ≤ 255
0≤b<7
a ∈ [0,1]
skip if (f<b>) = 1
None
1010 bbba ffff ffff
If bit ‘b’ in register ‘f’ is 1, then the
next instruction is skipped.
If bit ‘b’ is 1, then the next instruction
fetched during the current instruc-
tion execution, is discarded and a
NOP is executed instead, making this
a two-cycle instruction. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read Process Data
register ‘f’
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
FALSE
TRUE
BTFSS
:
:
FLAG, 1
Before Instruction
PC
=
After Instruction
If FLAG<1> =
PC
=
If FLAG<1> =
PC
=
address (HERE)
0;
address (FALSE)
1;
address (TRUE)
DS39616B-page 300
Preliminary
 2003 Microchip Technology Inc.