PIC18F2331 Datasheet, PDF (203/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 17-3: EXAMPLE DEAD TIME
RANGES
Fosc
(MHz)
40
40
40
40
32
32
32
32
25
25
25
25
20
20
20
20
10
10
10
10
5
5
5
5
4
4
4
4
MIPS
10
10
10
10
8
8
8
8
6.25
6.25
6.25
6.25
5
5
5
5
2.5
2.5
2.5
2.5
1.25
1.25
1.25
1.25
1
1
1
1
Prescaler
Selection
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
FOSC/2
FOSC/4
FOSC/8
FOSC/16
Dead
Time Min
50 ns
100 ns
200 ns
400 ns
62.5 ns
125 ns
250 ns
500 ns
80 ns
160 ns
320 ns
640 ns
100 ns
200 ns
400
800
200 ns
400 ns
800 ns
1.6 µs
400 ns
800 ns
1.6 µs
3.2 µs
0.5 µs
1 µs
2 µs
4 µs
Dead
Time Max
3.2 µs
6.4 µs
12.8 µs
25.6 µs
4 µs
8 µs
16 µs
32 µs
5.12 vs
10.2 µs
20.5 µs
41 µs
6.4 µs
12.8 µs
25.6 vs
51.2 µs
12.8 µs
25.6 µs
51.2 µs
102.4 µs
25.6 µs
51.2 µs
102.4 µs
204.8 µs
32 µs
64 µs
128 µs
256 µs
17.7.4 DEAD TIME DISTORTION
Note 1: For small PWM duty cycles, the ratio of
dead time to the active PWM time may
become large. In this case, the inserted
dead time will introduce distortion into
waveforms produced by the PWM mod-
ule. The user can ensure that dead time
distortion is minimized by keeping the
PWM duty cycle at least three times
larger than the dead time. A similar effect
occurs for duty cycles at or near 100%.
The maximum duty cycle used in the
application should be chosen such that
the minimum inactive time of the signal is
at least three times larger than the dead
time. If the dead time is greater or equal
to the duty cycle of one of the PWM out-
puts pairs, then that PWM pair will be
inactive for the whole period.
2: Changing the dead time values in
DTCON when the PWM is enabled may
result in undesired situation. Disable the
PWM (PTEN = 0) before changing the
dead time value
17.8 Independent PWM Output
Independent PWM mode is used for driving the loads
as shown in Figure 17-19 for driving one winding of a
switched reluctance motor. A particular PWM output
pair is configured in the Independent Output mode
when the corresponding PMOD bit in the PWMCON0
register is set. No dead time control is implemented
between the PWM I/O pins when the module is operat-
ing in the Independent mode and both I/O pins are
allowed to be active simultaneously. This mode can
also be used to drive stepper motors.
17.8.1 DUTY CYCLE ASSIGNMENT IN THE
INDEPENDENT MODE
In the Independent mode, each duty cycle generator is
connected to both PWM output pins in a given PWM
output pair. The odd and the even PWM output pins are
driven with a single PWM duty cycle generator. PWM1
and PWM0 are driven by the PWM channel which uses
PDC0 register to set the duty cycle, PWM3 and PWM2
with PDC1, PWM5 and PWM4 with PDC2, PWM7 and
PWM6 with PDC3, see Figure 17-3 and Register 17-3.
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 201