PIC18F2331 Datasheet, PDF (253/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
20.1 Configuring the A/D Converter
The A/D converter has two types of conversion, two
modes of operation and eight different sequencing
modes. These features are controlled by the ACONV
bit (ADCON0<5>), ACSH bit (ADCON0<4>) and
ACMOD<1:0> bits (ADCON0<3:2>). In addition, the
A/D channels are divided into four groups as defined
in the ADCHS register. Table 20-1 shows the
sequence configurations as controlled by ACSCH and
ACMOD<1:0>.
TABLE 20-1: AUTO-CONVERSION SEQUENCE CONFIGURATIONS
Mode
ACSCH ACMOD
Description
Multi-Channel Sequential Mode1
1
(SEQM1)
Multi-Channel Sequential Mode2
1
(SEQM2)
Multi-Channel Simultaneous Mode1
1
(STNM1)
Multi-Channel Simultaneous Mode2
1
(STNM2)
Single Channel Mode1 (SCM1)
0
Single Channel Mode2 (SCM2)
0
Single Channel Mode3 (SCM3)
0
Single Channel Mode4 (SCM4)
0
00 Group A and B are sampled and converted
sequentially
01 Group A, B, C and D are sampled and converted
sequentially
10 Group A and B are sampled simultaneously and
converted sequentially
11 Group A and B are sampled simultaneously, then
converted sequentially. Then, Group C and D are
sampled simultaneously, then converted
sequentially.
00 Group A is sampled and converted
01 Group B is sampled and converted
10 Group C is sampled and converted
11 Group D is sampled and converted
20.1.1 CONVERSION TYPE
Two types of conversions exist in the high-speed 10-bit
A/D converter module that are selected using the
ACONV bit. Single-shot mode allows a single
conversion or sequence to be when ACONV = ‘0’. At
the end of the sequence, the GO/DONE bit will be
automatically cleared and the interrupt flag, ADIF, will
be set. When using Single-shot mode and configured
for Simultaneous mode, STNM2, acquisition time must
be used to ensure proper conversion of the analog
input signals.
Continuous Loop mode allows the defined sequence to
be executed in a continuous loop when ACONV = ‘1’.
In this mode, either the user can trigger the start of con-
version by setting the GO/DONE bit or one of the A/D
triggers can start the conversion. The interrupt flag
ADIF is set based on the configuration of the bits
ADRS<1:0> (ADCON3<7:6>). In simultaneous modes,
STNM1 and STNM2, acquisition time must be config-
ured to ensure proper conversion of the analog input
signals.
20.1.2 CONVERSION MODE
The ACSCH bit (ADCON0<4>) controls how many
channels are used in the configured sequence. When
clear, the A/D is configured for single channel conver-
sion and will convert the group selected by
ACMOD<1:0> and channel selected by GxSEL<1:0>
(ADCHS). When ACSCH = ‘1’, the A/D is configured for
multiple channel conversion and the sequence is
defined by ACMOD<1:0>.
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 251