PIC18F2331 Datasheet, PDF (121/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 10-14: BLOCK DIAGRAM OF RC1
PORT/CCP2 Select
CCP2 Data Out
0
1
RD LATC
Data Bus
D
Q
WR LATC
or
PORTC
CK Q
Data Latch
D
Q
WR TRISC
CK Q
TRIS Latch
VDD
P
N
VSS
To RC0 Pin
RC1 Pin
RD TRISC
RD PORTC
Q
D
EN
Schmitt
Trigger
FLTAMX
CCP2 Input
FLTA input⁽¹⁾
Note 1: FLTA input is multiplexed with RC1 and RD4 using FLTAMX configuration bit in CONFIG3L register.
FIGURE 10-15: BLOCK DIAGRAM OF RC2
PORT/CCP1 Select
CCP1 Data Out
0
1
RD LATC
Data Bus
D
Q
WR LATC
or
PORTC
CK Q
Data Latch
WR TRISC
D
Q
CK Q
TRIS Latch
VDD
P
N
VSS
RC2 Pin
RD TRISC
RD PORTC
CCP1 Input/FLTB input
Q
D
EN
Schmitt
Trigger
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 119