PIC18F2331 Datasheet, PDF (372/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 25-21: A/D CONVERTER CHARACTERISTICS: PIC18F2331/2431/4331/4431 (INDUSTRIAL)
PIC18LF2331/2431/4331/4431 (INDUSTRIAL)
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
Device Supply
AVDD Analog VDD Supply
VDD-0.3
—
VDD+0.3
V
AVSS Analog VSS Supply
VSS-0.3
VSS+0.3
V
IAD Module Current
(during conversion)
500
µA VDD = 5V
250
µA VDD = 2.5V
IADO Module Current Off
1.0
µA
AC Timing Parameters
A10
FTHR Throughput rate
—
200
ksps VDD = 5V, single channel
—
75
ksps VDD < 3V, single channel
A11
TAD A/D Clock Period
385
1000
20,000
20,000
ns VDD = 5V
VDD = 3V
A12
TRC A/D Internal RC Oscillator Period
A13
TCNV Conversion Time⁽¹⁾
12
A14
TACQ Acquisition Time⁽²⁾
2⁽²⁾
500
750
10000
12
1500
2250
20000
12
ns PIC18F parts
ns PIC18LF parts
ns AVDD < 3.0V
TAD
TAD
A16
TTC Conversion start from external
1/4 TCY
1Tcy
Reference Inputs
A20
VREF Reference voltage for 10-bit
resolution
(VREF+ - VREF-)
1.5
—
AVDD-AVSS V VDD ≥ 3V
1.8
—
AVDD-AVSS V VDD < 3V
A21
VREFH Reference voltage High
(AVDD or VREF+)
1.5V
—
AVDD
V VDD ≥ 3V
A22
VREFL Reference voltage Low
(AVSS or VREF-)
AVSS
— VREFH-1.5V V
A23
IREF Reference Current
150µA
75µA
VDD = 5V
VDD = 2.5V
Analog Input Characteristics
A26
VAIN Input Voltage⁽³⁾
AVSS-0.3
—
AVDD+0.3 V
A30
ZAIN Recommended impedance of
analog voltage source
—
—
2.5
kΩ
A31
ZCHIN Analog channel input impedance
—
10.0
kΩ VDD = 3.0 V
DC Performance
A41
NR Resolution
10 bits
—
A42
EIL Integral Nonlinearity
—
—
< ±1
LSb VDD ≥ 3.0V
VREFH ≥ 3.0V
A43
EIL Differential Nonlinearity
—
—
< ±1
LSb VDD ≥ 3.0V
VREFH ≥ 3.0V
A45
EOFF Offset error
—
±0.5
< ±1.5
LSb VDD ≥ 3.0V
VREFH ≥ 3.0V
A46
EGA Gain error
A47
— Monotonicity⁽⁴⁾
—
±0.5
< ±1.5
LSb VDD ≥ 3.0V
VREFH ≥ 3.0V
guaranteed
— VDD ≥ 3.0V
VREFH ≥ 3.0V
Note 1:
2:
3:
4:
Conversion time does not include acquisition time. See Section 20.0 “10-bit High-Speed Analog-to-Digital Converter
(A/D) Module” for a full discussion of acquisition time requirements.
In sequential modes, Tacq should be 12Tad or greater.
For VDD < 2.7V and temperature below 0°C, VAIN should be limited to range < VDD/2.
The A/D conversion result never decreases with an incraese in the input voltage, and has no missing codes.
DS39616B-page 370
Preliminary
 2003 Microchip Technology Inc.