PIC18F2331 Datasheet, PDF (249/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
REGISTER 20-4:
ADCON3: A/D CONTROL REGISTER 3
R/W-0
R/W-0
U-0
R/W-0
ADRS1 ADRS0
—
SSRC4
bit 7
R/W-0 R/W-0 R/W-0
SSRC3 SSRC2 SSRC1
R/W-0
SSRC0
bit 0
bit 7-6
bit 5
bit 4:0
ADRS<1:0>: A/D Result Buffer Depth Interrupt Select Control bits for Continuous Loop mode
The ADRS bits are ignored in Single-shot mode.
00 =Interrupt is generated when each word is written to the buffer
01 =Interrupt is generated when the 2nd & 4th words are written to the buffer
10 =Interrupt is generated when the 4th word is written to the buffer
11 =Unimplemented
Unimplemented: Read as ‘0’
SSRCx<4:0>: A/D Trigger Source Select bits
00000 =All triggers disabled
xxxx1 =External interrupt RC3/INT0 starts A/D sequence
xxx1x =Timer5 starts A/D sequence
xx1xx =Input Capture 1 (IC1) starts A/D sequence
x1xxx =CCP2 compare match starts A/D sequence
1xxxx =Power Control PWM module rising edge starts A/D sequence
Note 1: SSRCx<4:0> bits can be set such that any of the triggers will start conversion (e.g.
SSRCx<4:0)> = 00101, will trigger the A/D conversion sequence when RC3/INT0
or Input Capture 1 event occurs).
Legend:
R = Readable bit
-n = Value at Reset
W = Writable bit
‘1’ = bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared x = bit is unknown
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 247