PIC18F2331 Datasheet, PDF (202/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
REGISTER 17-5: DTCON – DEAD TIME CONTROL REGISTER
R/W-0
DTPS1
R/W-0
DTPS0
R/W-0
DT5
R/W-0
DT4
R/W-0
DT3
bit 7
R/W-0
DT2
R/W-0
DT1
R/W-0
DT0
bit 0
bit 7-6
bit 5-0
DTPS1:DTPS0: Dead Time Unit A Prescale Select bits
11 = Clock source for Dead Time Unit is FOSC/16.
10 = Clock source for Dead Time Unit is FOSC/8.
01 = Clock source for Dead Time Unit is FOSC/4.
00 = Clock source for Dead Time Unit is FOSC/2.
DT5:DT0: Unsigned 6-bit dead time value bits for Dead Time Unit.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared x = bit is unknown
17.7.2 DEAD TIME RANGES
The amount of dead time provided by the dead time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value defined in the DTCON
register. Four input clock prescaler selections have
been provided to allow a suitable range of dead times
based on the device operating frequency. FOSC/2,
FOSC/4, FOSC/8 and FOSC/16 are the clock prescaler
options available using the DTPS1:DTPS0 control bits
in the DTCON register.
After selecting an appropriate prescaler value, the
dead time is adjusted by loading a 6-bit unsigned value
into DTCON<5:0>. The dead time unit prescaler is
cleared on any of the following events:
• On a load of the down timer due to a duty cycle
comparison edge event;
• On a write to the DTCON register; or
• On any device Reset.
17.7.3 DECREMENTING THE DEAD TIME
COUNTER
The dead time counter is clocked from any of the Q
clocks based on the following conditions.
1. The dead time counter is clocked on Q1 when:
• The DTPS bits are set to any of the following
dead time prescaler settings: Fosc/4, FOSC/8,
FOSC/16
• The PWM Time Base Prescale bits
(PTCKPS) are set to any of the following
prescale ratios: FOSC/16, FOSC/64,
FOSC/256.
2. The dead time counter is clocked by a pair of
Q-clocks when the PWM Time Base Prescale
bits are set to 1:1 (PTCKPS1:PTCKPS0 = 00,
FOSC/4) and the dead time counter is clocked by
the FOSC/2 (DTPS1:DTPS0 = 00).
3. The dead time counter is clocked using every
other Q-clock depending on the two LSbs in the
Duty Cycle registers:
• If the PWM duty cycle match occurs on Q1 or
Q3, then the dead time counter is clocked
using every Q1 and Q3.
• If the PWM duty cycles match occurs on Q2
or Q4, then the dead time counter is clocked
using every Q2 and Q4.
4. When the DTPS1:DTPS0 bits are set to any of
the other dead time prescaler settings, (i.e.,
FOSC/4, FOSC/8 or FOSC/16) and the PWM Time
Base Prescaler is set to 1:1, the dead time
counter is clocked by the Q-clock corresponding
to the Q-clocks on which the PWM duty cycle
match occurs.
The actual dead time is calculated from the DTCON
register as follows:
Dead Time = Dead time value / (FOSC/prescaler)
Table 17-3 shows example dead time ranges as a
function of the input clock prescaler selected and the
device operating frequency.
DS39616B-page 200
Preliminary
 2003 Microchip Technology Inc.