PIC18F2331 Datasheet, PDF (167/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
16.1.2 PERIOD MEASUREMENT MODE
The Period Measurement mode is selected by setting
CAPxM3:CAPxM0 = 0101. In this mode, the value of
Timer5 is latched into the CAPxBUF register on the ris-
ing edge of the input capture trigger and Timer5 is sub-
sequently reset to 0000h (optional by setting
CAPxREN = 1) on the next TCY (see capture and reset
relationship in Figure 16-4).
16.1.3 PULSE WIDTH MEASUREMENT
MODE
The Pulse Width Measurement mode can be config-
ured for two different edge sequences, such that the
pulse width is based on either the falling to rising edge
of the CAPx input pin (CAPxM3:CAPxM0 = 0110), or
on the rising to falling edge (CAPxM3:CAPxM0 =
0111).
Timer5 is always reset on the edge when the
measurement is first initiated. For example, when the
measurement is based on the falling to rising edge,
Timer5 is first reset on the falling edge and the timer
value is captured on the rising edge thereafter. Upon
entry into the Pulse Width Measurement mode, the
very first edge detected on the CAPx pin is always
captured. The TMR5 value is reset on the first active
edge (see Figure 16-5).
FIGURE 16-5:
PULSE WIDTH MEASUREMENT MODE TIMING
Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3 Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3 Q4 Q1Q2Q3Q4
TMR5⁽¹⁾
0012
0013 0014
0015
0000 0001
0002
0000 0001
0002
CAP1 pin⁽²⁾
CAP1BUF⁽³⁾
TMR5 reset^(4,5)
0015
0001
0002
Instruction ^{MOVWF CAP1CON}
Execution⁽²⁾
Note 1: TMR5 is a synchronous time base input to the Input Capture, prescaler = 1:1. It increments on every Q1 rising edge.
2: IC1 is configured in Pulse Width Measurement mode (CAP1M3:CAP1M0 = 0111, rising to falling pulse width measure-
ment). No noise filter on CAP1 input is used. MOVWF instruction loads CAP1CON when W = 0111.
3: TMR5 value is latched by CAP1BUF on TCY rising edge. In the event that a write to TMR5 coincides with an input cap-
ture event, the write will always take precedence. All input capture buffers, CAP1BUF, CAP2BUF and CAP3BUF, are
updated with the incremented value of the time base on the next TCY clock edge when the capture event takes place
(see Note 4 when Reset occurs).
4: TMR5 Reset is normally an asynchronous Reset signal to TMR5. When used in Pulse Width Measurement mode, it is
always present on the edge that first initiates the pulse width measurement (i.e., when configured in the rising to falling
Pulse Width Measurement mode, it is active on each rising edge detected. In the falling to rising Pulse Width Measure-
ment mode, it is active on each falling edge detected.
5: TMR5 Reset pulse is activated on the capture edge. CAP1REN bit has no bearing in this mode.
 2003 Microchip Technology Inc.
Preliminary
DS39616B-page 165