82443LX Datasheet, PDF (78/144 Pages) Intel Corporation – INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER (PAC)

INTEL 82443LX (PAC)
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Expansion Area (C0000h−DFFFFh)
This 128-KB ISA Expansion region is divided into eight 16-KB segments. Each segment can be assigned one
of four Read/Write states: read-only, write-only, read/write, or disabled. Typically, these blocks are mapped
through the Primary PCI bridge to ISA space. Memory that is disabled is not remapped. C0000h–CFFFFh is
also an optional SMM space.
Extended System BIOS Area (E0000h−EFFFFh)
This 64-KB area is divided into four 16-KB segments. Each segment can be assigned independent read and
write attributes so it can be mapped either to main memory or to PCI. Typically, this area is used for RAM or
ROM. Memory segments that are disabled are not remapped elsewhere.
System BIOS Area (F0000h−FFFFFh)
This area is a single 64-KB segment and can be assigned read and write attributes. The default is read/write
disabled and cycles are forwarded to PCI. By manipulating the read/write attributes, PAC can “shadow” BIOS
into the main memory. When disabled, this segment is not remapped.
Extended Memory Area
This memory area is from 1 MB to 4 GB - 1 (100000h to FFFFFFFFh) and is divided into the following
regions:
• Main memory from 1 MB to the Top of Memory (maximum of 256 MB using 16-Mbit DRAM technology or
1 GB using 64-Mbit technology)
• PCI Memory space from the Top of Memory to 4 GB with two specific ranges:
 APIC Configuration Space from FEC0_0000h (4 GB minus 20 MB) to FECF_FFFFh and
FEE0_0000h to FEEF_FFFFh.
 High BIOS area from 4 GB to 4 GB minus 2 MB
Main DRAM Address Range (0010_0000h to Top of Main Memory)
The address range from 1 MB to the top of main memory is mapped to main memory address range
controlled by PAC. All accesses to addresses within this range are forwarded to main memory, unless a hole
in this range is created via the FDHC register. Accesses within this hole are forwarded to PCI. The range of
physical memory disabled by opening the hole is not remapped to the Top of the Memory.
PCI Memory Address Range (Top of Main Memory to 4 GB)
The address range from the top of main memory to 4 GB (top of physical memory space supported by PAC)
is normally mapped to PCI. However, the A.G.P. memory window is mapped to the A.G.P. and Graphics
Aperture range which is mapped to main memory.
NOTE
The A.G.P. Memory Window and Graphics Aperture Window override the default decode to PCI of the
memory space above the top of the main DRAM.
There are two sub-ranges within this address range defined as APIC Configuration Space and High BIOS
Address Range. The A.G.P. Memory Window and Graphics Aperture Window MUST NOT overlap with these
two ranges. These ranges are described in detail in the following paragraphs.
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