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82443LX Datasheet, PDF (5/144 Pages) Intel Corporation – INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER (PAC) | |||
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INTEL 82443LX (PAC)
3.3.19. FDHCâFIXED DRAM HOLE CONTROL REGISTER (DEVICE 0) ............................................ 50
3.3.20. DRAMXCâDRAM EXTENDED CONTROL REGISTER (DEVICE 0) ........................................ 51
3.3.21. MBSCâMEMORY BUFFER STRENGTH CONTROL REGISTER (DEVICE 0)......................... 52
3.3.22. MTTâMULTI-TRANSACTION TIMER REGISTER (DEVICE 0) ................................................ 54
3.3.23. SMRAMâSYSTEM MANAGEMENT RAM CONTROL REGISTER (DEVICE 0) ....................... 55
3.3.24. ERRCMDâERROR COMMAND REGISTER (DEVICE 0)......................................................... 56
3.3.25. ERRSTS0âERROR STATUS REGISTER 0 (DEVICE 0).......................................................... 57
3.3.26. ERRSTS1âERROR STATUS REGISTER 1 (DEVICE 0).......................................................... 59
3.3.27. RSTCTRLâRESET CONTROL REGISTER (DEVICE 0) .......................................................... 60
3.3.28. ACAPIDâA.G.P. CAPABILITY IDENTIFIER REGISTER (DEVICE 0)....................................... 61
3.3.29. AGPSTATâA.G.P. STATUS REGISTER (DEVICE 0) .............................................................. 62
3.3.30. AGPCMDâA.G.P. COMMAND REGISTER (DEVICE 0)........................................................... 62
3.3.31. AGPCTRLâA.G.P. CONTROL REGISTER (DEVICE 0) ........................................................... 63
3.3.32. APSIZEâAPERTURE SIZE (DEVICE 0)................................................................................... 64
3.3.33. ATTBASEâAPERTURE TRANSLATION TABLE BASE REGISTER (DEVICE 0)..................... 65
3.3.34. AMTTâA.G.P. INTERFACE MULTI-TRANSACTION TIMER REGISTER (DEVICE 0) ............. 65
3.3.35. LPTTâLOW PRIORITY TRANSACTION TIMER REGISTER (DEVICE 0)................................ 65
3.4. A.G.P. Configuration Registersâ(Device 1) ....................................................................................... 66
3.4.1. VID1âVENDOR IDENTIFICATION REGISTER (DEVICE 1) ...................................................... 66
3.4.2. DID1âDEVICE IDENTIFICATION REGISTER (DEVICE 1) ........................................................ 66
3.4.3. PCICMD1âPCI-PCI COMMAND REGISTER (DEVICE 1) .......................................................... 66
3.4.4. PCISTS1âPCI-PCI STATUS REGISTER (DEVICE 1)................................................................ 67
3.4.5. RID1âREVISION IDENTIFICATION REGISTER (DEVICE 1) .................................................... 67
3.4.6. SUBC1âSUB-CLASS CODE REGISTER (DEVICE 1) ............................................................... 67
3.4.7. BCC1âBASE CLASS CODE REGISTER (DEVICE 1)................................................................ 68
3.4.8. HDR1âHEADER TYPE REGISTER (DEVICE 1)........................................................................ 68
3.4.9. PBUSNâPRIMARY BUS NUMBER REGISTERâDEVICE #1 ................................................... 68
3.4.10. SBUSNâSECONDARY BUS NUMBER REGISTER (DEVICE 1) ............................................. 69
3.4.11. SUBUSNâSUBORDINATE BUS NUMBER REGISTER (DEVICE 1)........................................ 69
3.4.12. SMLTâSECONDARY MASTER LATENCY TIMER REGISTER (DEVICE 1)............................ 69
3.4.13. IOBASEâI/O BASE ADDRESS REGISTER (DEVICE 1) .......................................................... 70
3.4.14. IOLIMITâI/O LIMIT ADDRESS REGISTER (DEVICE 1)........................................................... 70
3.4.15. SSTSâSECONDARY PCI-PCI STATUS REGISTER (DEVICE 1) ............................................ 71
3.4.16. MBASEâMEMORY BASE ADDRESS REGISTER (DEVICE 1)................................................ 72
3.4.17. MLIMITâMEMORY LIMIT ADDRESS REGISTER (DEVICE 1) ................................................ 72
3.4.18. PMBASEâPREFETCHABLE MEMORY BASE ADDRESS REGISTER (DEVICE 1) ................ 73
3.4.19. PMLIMITâPREFETCHABLE MEMORY LIMIT ADDRESS REGISTER (DEVICE 1) ................. 73
3.4.20. BCTRLâPCI-PCI BRIDGE CONTROL REGISTER (DEVICE 1) ............................................... 74
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