82443LX Datasheet, PDF (23/144 Pages) Intel Corporation – INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER (PAC)

E
INTEL 82443LX (PAC)
Name
RBF#
ST[2:0]
ADSTB_A
ADSTB_B
SBSTB
GFRAME#
Table 4. A.G.P. Signals
Type
Description
A.G.P. Sideband Flow Control Signals
I
A.G.P.
Read Buffer Full: RBF# indicates if the master is ready to accept previously
requested low priority read data. When RBF# is asserted, PAC is not allowed to
return (low priority) read data to the A.G.P. master.
A.G.P. Sideband Status Signals
O
A.G.P.
Status Bus: ST[2:0] provide information from the arbiter to an A.G.P. master on
what it may do. ST[2:0] only has meaning to the master when its GNT# is
asserted. When GNT# is negated these signals have no meaning and must be
ignored.
ST[2:0] Description
000
Indicates that previously requested low priority read data is being
returned to the master.
001
Indicates that previously requested high priority read data is being
returned to the master.
010
Indicates that the master is to provide low priority write data for a
previous enqueued write command.
011
Indicates that the master is to provide high priority write data for a
previous enqueued write command.
100
Reserved
101
Reserved
110
Reserved
111
Indicates that the master has been given permission to start a bus
transaction. The master may enqueue A.G.P. requests by asserting
PIPE# or start a PCI transaction by asserting GFRAME#. ST[2:0] are
always outputs from PAC and inputs to the master.
A.G.P. Sideband Clocking Signals (Strobes)
I/O
(t/s)
A.G.P.
AD Bus Strobe A: Provides timing for double clocked data on GAD[15:0]. The
agent that is providing data drives this signal. This signal has been labeled
ADSTB_A in some documents.
I/O
(t/s)
A.G.P.
AD Bus Strobe B: Provides timing for double clocked data on the GAD[31:16].
The agent that is providing data drives this signal. This signal has been labeled
ADSTB_B in some documents.
I
Sideband Strobe: Provides timing for SBA[7:0]. It is always driven by the
A.G.P. A.G.P. compliant master.
A.G.P. FRAME# Protocol Signals (similar to PCI)²
I/O A.G.P. A.G.P. Frame: Assertion indicates the address phase of a A.G.P. FRAME#
protocol transfer. Negation indicates that one more data transfers are desired
by the cycle initiator. GFRAME# remains negated by an internal pull up resistor.
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