82443LX Datasheet, PDF (76/144 Pages) Intel Corporation – INTEL 440LX AGPSET: 82443LX PCI A.G.P. CONTROLLER (PAC)

INTEL 82443LX (PAC)
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4.0. FUNCTIONAL DESCRIPTION
4.1. System Address Map
A Pentium II processor based system with the 440LX AGPset supports 4 GB of addressable memory space
and 64 KB of addressable I/O space. The lower 1 MB of the addressable memory is divided into regions that
can be individually controlled with programmable attributes such as disable, read/write, write only, or read
only (see Register Description section for details). This section describes memory space partitioning and
function. The I/O address space mapping is explained at the end of this section.
In this section, it is assumed that all of the compatibility memory ranges reside on the PCI bus, except VGA
ranges that can be potentially mapped on A.G.P. Thus, the phrase “forwarded to PCI” refers to the PCI bus,
unless the A.G.P. bus is specifically named.
NOTE
The Pentium II processor supports addressing of memory ranges larger than 4 GB. PAC claims any
access over 4 GB and terminates the transaction (without forwarding it to the PCI bus). Host writes are
terminated by completing the host cycle and discarding the data. Host reads are terminated by
returning all zeros on the host bus. Note that PCI Dual Address Cycle Mechanism (DAC) that allows
addressing of >4-GB range is not supported by PAC (either on PCI or on the A.G.P. interface).
4.1.1. MEMORY ADDRESS RANGES
The memory address map (Figure 4) represents the maximum 64 GB of CPU address space. PAC supports
4 GB of main memory. Accesses to memory space below 4 GB and above top of DRAM, to the compatibility
video buffer range, to the programmable holes and to the memory window (if enabled) are forwarded to the
PCI. Note that if the memory holes are enabled below the top of main memory area, then the corresponding
DRAM ranges are not remapped.
4.1.1.1.
Compatibility Area
This area is divided into the following address regions:
• 0–512-KB DOS Area
• 512-KB–640-KB DOS Area—Optional ISA/PCI Memory
• 640-KB–768-KB Video Buffer Area
• 768-KB–896-KB in 16-KB sections (total of 8 sections)—Expansion Area
• 896-KB–960-KB in 16-KB sections (total of 4 sections)—Extended System BIOS Area
• 960-KB–1-MB Memory (BIOS Area)—System BIOS Area
There are thirteen ranges which can be enabled or disabled independently for both read and write cycles and
one (512 KB–640 KB) which can be mapped to either main DRAM or PCI.
DOS Area (00000h−9FFFh)
The DOS area is 640 KB and is divided into two parts. The 512-KB area (0h−7FFFFh) is always mapped to
the main memory controlled by PAC. The 128-KB area (080000h−09FFFFh) can be mapped to PCI or to
main memory. By default, this range is mapped to main memory and can be declared as a main memory hole
(accesses forwarded to PCI) via the FDHC register.
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