TDA5240 Datasheet, PDF (77/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Functional Description
Chapter 2.5.2 and Chapter 2.5.5. The data which is read from the RX FIFO is
accompanied by information which contains the status of the respective receive
operation. Note that the availability of received data packets is communicated via alerts
in the control interface.
line decoder
framer
TDA5240
RX FIFO
data
interface
RX data
bit
synchronizer
scheduler
Figure 46 Data interface for the Packet Oriented FIFO Mode
Packet Oriented Transparent Payload Mode (POTP)
This mode is very similar to POF Mode as data which is going into FIFO is also available
via RXD and RXSTR signals (see Chapter 2.5.3 Digital Output Pins).
TDA5240
line decoder
framer
bit
synchronizer
scheduler
RX FIFO
data
interface
RX data
Strobe
Figure 47 Data interface for the Packet Oriented Transparent Payload Mode
In the TDA5240, there are specific digital output lines (PPx pin) for the Bi-phase decoded
data and an appropriate Strobe signal. During inactivity of the receiver, the line is in
default mode switched to low.
Data Sheet
77
V4.0, 2010-02-19