TDA5240 Datasheet, PDF (204/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
Field
Bits
WUPAT0
7:0
Type
w
Wake-Up Pattern Register 1
Description
Wake Up Detection Pattern: Bit 7...Bit 0(LSB) (in Bits/Chips)
Reset: 00_H
A_WUPAT1
Wake-Up Pattern Register 1

Offset
019_H
:83$7
Z
Reset Value
00_H

Field
Bits
WUPAT1
7:0
Type
w
Description
Wake Up Detection Pattern: (MSB) Bit 15...Bit 8 (in Bits/Chips)
Reset: 00_H
Wake-Up Bit or Chip Count Register
A_WUBCNT
Wake-Up Bit or Chip Count Register


8186('

Offset
01A_H
:8%&17
Z
Field
Bits
UNUSED
7
Type
-
Description
UNUSED
Reset: 0_H
Reset Value
00_H

Data Sheet
204
V4.0, 2010-02-19