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TDA5240 Datasheet, PDF (104/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver
TDA5240
Functional Description
2.6.1.6 Automatic Modulation Switching
In Self Polling Mode, the chip is able to automatically change the type of modulation
after a wake-up criterion was fulfilled in a received data stream. The type of modulation
used in the different operational modes is selected by the SFR control bit MT.
2.6.1.7 Multi-Channel in Self Polling Mode
As previously mentioned, in Self Polling Mode the TDA5240 allows RF scans on up to
three RF channels per configuration, this can be defined in the x_CHCFG register.
Channel frequencies are defined in registers x_PLLINTCy, x_PLLFRAC0Cy,
x_PLLFRAC1Cy, x_PLLFRAC2Cy, where x = A, B, C or D and y = 1, 2 or 3.
The channel number at which a wake-up criterion has been found is available in register
RFPLLACC. See also Chapter 2.4.5 Sigma-Delta Fractional-N PLL Block.
2.6.1.8 Run Mode Self Polling (RMSP)
The chip enters Run Mode Self Polling after a successful fulfillment of a wake-up
criterion in Self Polling Mode.
When Wake-Up criterion for RSSI or Signal Recognition (see Chapter 2.4.8.1) is
selected and fulfilled, this leads to a change to Run Mode Self Polling. This will be
interesting especially in case of a transparent data stream being processed externally by
the Application Controller (see Chapter 2.5.1.2 Data Interface).
The following steps are performed automatically, depending on register settings:
• Modulation switching (see Chapter 2.6.1.6 Automatic Modulation Switching)
• Wait for valid TSI (see Chapter 2.4.8.6 Frame Synchronization)
• Initialize FIFO (see Chapter 2.5.2 Receive FIFO) and write data to FIFO
• Scan for MIDs (see Chapter 2.4.8.7 Message ID Scanning)
Depending on interrupt masking, the host microcontroller is alerted when
• a data frame has started,
• an MID has been found, (if enabled) or
• EOM (End of Message) has been detected.
See also Chapter 2.5.4 Interrupt Generation Unit
Run Mode Self Polling is left, when synchronization is lost and the timeout timer for loss
of synchronization (TOTIM_SYNC) has elapsed, or when one of the other timeout timers
(TOTIM_TSI, TOTIM_EOM) for each configuration (A, B, C, D) has elapsed, or when an
EOM occurred and the SFR bit EOM2SPM is activated, or when the operating mode is
switched to SLEEP or Run Mode Slave by the host microcontroller.
Data Sheet
104
V4.0, 2010-02-19