TDA5240 Datasheet, PDF(190/284 Page) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5240 Datasheet, PDF (190/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5240

Appendix

Register Overview

Table 2 Register Overview and Reset Value (contâd)

Register Short Name Register Long Name

Offset Address

D_MIDC1

D_IF1

D_WUC

D_WUPAT0

D_WUPAT1

D_WUBCNT

D_WURSSITH1

D_WURSSIBL1

Message ID Control Register 1

IF1 Register

Wake-Up Control Register

Wake-Up Pattern Register 0

Wake-Up Pattern Register 1

Wake-Up Bit or Chip Count Register

RSSI Wake-Up Threshold for Channel 1 Register

RSSI Wake-Up Blocking Level Low Channel 1

Register

315H

316H

317H

318H

319H

31AH

31BH

31CH

D_WURSSIBH1

RSSI Wake-Up Blocking Level High Channel 1

Register

31DH

D_WURSSITH2

D_WURSSIBL2

RSSI Wake-Up Threshold for Channel 2 Register 31EH

RSSI Wake-Up Blocking Level Low Channel 2

Register

31FH

D_WURSSIBH2

RSSI Wake-Up Blocking Level High Channel 2

Register

320H

D_WURSSITH3

D_WURSSIBL3

RSSI Wake-Up Threshold for Channel 3 Register 321H

RSSI Wake-Up Blocking Level Low Channel 3

Register

322H

D_WURSSIBH3

RSSI Wake-Up Blocking Level High Channel 3

Register

323H

D_SIGDETSAT

D_WULOT

D_SYSRCTO

D_TOTIM_SYNC

D_TOTIM_TSI

D_TOTIM_EOM

D_AFCLIMIT

D_AFCAGCD

D_AFCSFCFG

D_AFCK1CFG0

D_AFCK1CFG1

D_AFCK2CFG0

D_AFCK2CFG1

D_PMFUDSF

D_AGCSFCFG

D_AGCCFG0

D_AGCCFG1

D_AGCTHR

D_DIGRXC

Signal Detector Saturation Threshold Register

Wake-Up on Level Observation Time Register

Synchronization Search Time-Out Register

SYNC Timeout Timer Register

TSI Timeout Timer Register

EOM Timeout Timer Register

AFC Limit Configuration Register

AFC/AGC Freeze Delay Register

AFC Start/Freeze Configuration Register

AFC Integrator 1 Gain Register 0

AFC Integrator 1 Gain Register 1

AFC Integrator 2 Gain Register 0

AFC Integrator 2 Gain Register 1

Peak Memory Filter Up-Down Factor Register

AGC Start/Freeze Configuration Register

AGC Configuration Register 0

AGC Configuration Register 1

AGC Threshold Register

Digital Receiver Configuration Register

324H

325H

326H

327H

328H

329H

32AH

32BH

32CH

32DH

32EH

32FH

330H

331H

332H

333H

334H

335H

336H

Reset Value

00H

20H

04H

00H

00H

00H

00H

FFH

00H

00H

FFH

00H

00H

FFH

00H

10H

00H

87H

FFH

00H

00H

02H

00H

00H

00H

00H

00H

00H

42H

00H

2BH

03H

08H

40H

Data Sheet

190

V4.0, 2010-02-19

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