TDA5240 Datasheet, PDF (239/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
A_EOMDLENP
EOM Data Length Limit Parallel Mode
Register

Offset
057_H
'$7/(13
Z
Reset Value
00_H

Field
Bits
DATLENP
7:0
Type
w
Channel Configuration Register
Description
Length of Data Field in Telegram in Parallel Mode for TSI Pattern B,
only valid when EOM criterion is EOMDATLEN
Counting of number of payload bits starts after the last TSI Bit. EOM will
be generated after the last payload bit.
In 8-bit extended TSI mode, the value must be the payload length + 1,
because of the additional bit inserted (matching information).
Min: 00h = 256 payload bits
Reg. value 01h = 1 payload bit
Max: FFh = 255 payload bits
Reset: 00_H
A_CHCFG
Channel Configuration Register

8186('



(;7352&
Z
Offset
058_H

(20630
Z


12&
Z
Field
Bits
UNUSED
7
Type
-
Description
UNUSED
Reset: 0_H
Reset Value
04_H


07
Z
Data Sheet
239
V4.0, 2010-02-19