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| TDA5240 Datasheet, PDF (249/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver | |||
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PPx Port Configuration Register
TDA5240
Appendix
Register Description
PPCFG2
PPx Port Configuration Register
Offset
083H
33+33(
1
Z
33+33(
1
Z
33+33(
1
Z
33+33(
1
Z
33,19
Z
33,19
Z
Reset Value
00H
33,19
Z
33,19
Z
Field
Bits
PP3HPPEN 7
PP2HPPEN 6
PP1HPPEN 5
PP0HPPEN 4
PP3INV
3
PP2INV
2
PP1INV
1
PP0INV
0
Type
w
w
w
w
w
w
w
w
Description
PP3 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP2 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP1 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP0 High Power Pad Enable
0B Normal
1B High Power
Reset: 0H
PP3 Inversion Enable
0B Not Inverted
1B Inverted
Reset: 0H
PP2 Inversion Enable
0B Not Inverted
1B Inverted
Reset: 0H
PP1 Inversion Enable
0B Not Inverted
1B Inverted
Reset: 0H
PP0 Inversion Enable
0B Not Inverted
1B Inverted
Reset: 0H
Data Sheet
249
V4.0, 2010-02-19
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