TDA5240 Datasheet, PDF (274/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
Field
WUC
Bits
Type Description
0
rc
Interrupt Request by "Wake Up" from Configuration C (Reset event
sets all Bits to 1)
0_B Not detected
1_B Detected
Reset: 1_H
RF PLL Actual Channel and Configuration Register
RFPLLACC
RF PLL Actual Channel and Configuration
Register
Offset
0AA_H


3/'/(1
U


5063$&)*
U


5063$&
U
Reset Value
00_H


630$&
U
Field
Bits
PLDLEN
7:6
RMSPACFG 5:4
RMSPAC
3:2
SPMAC
1:0
Type
r
r
r
r
Description
Payload Data Length stored at TSI detection of the next message,
PLDLEN(9:0) = RFPLLACC.PLDLEN(MSB) & PLDLEN(LSB).
Cleared with INIT FIFO
Min. 000h = 0 bits received
Max. 3FFh = 1023 bits received
Reset: 0_H
RF PLL Run Mode Self Polling Actual Configuration
00_B Configuration A
01_B Configuration B
10_B Configuration C
11_B Configuration D
Reset: 0_H
RF PLL Run Mode Self Polling Actual Channel
00_B No valid data in FIFO from any channel and configuration
01_B Data in FIFO belong to Channel 1
10_B Data in FIFO belong to Channel 2
11_B Data in FIFO belong to Channel 3
Reset: 0_H
RF PLL Self Polling Mode Actual Channel
00_B No Wake Up from any Channel was actually found
01_B Wake Up was found from Channel 1
10_B Wake Up was found from Channel 2
11_B Wake Up was found from Channel 3
Reset: 0_H
Data Sheet
274
V4.0, 2010-02-19