TDA5240 Datasheet, PDF (275/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

RSSI Peak Detector Readout Register
TDA5240
Appendix
Register Description
RSSIPRX
RSSI Peak Detector Readout Register

Offset
0AB_H
566,35;
UF
Field
Bits
RSSIPRX
7:0
Type
rc
Description
RSSI Peak Level during Receiving
Tracking is active when Digital Receiver is enabled
Set at higher peak levels than stored
Cleared at Reset and SPI read out
Reset: 00_H
RSSI Payload Peak Detector Readout Register
Reset Value
00_H

RSSIPPL
RSSI Payload Peak Detector Readout
Register

Offset
0AC_H
566,33/
U
Field
Bits
RSSIPPL
7:0
Type
r
Payload Data Length Register
Description
RSSI Peak Level during Payload
Tracking starts after FSYNC + PKBITPOS
Set at every EOM
Cleared at the Reset only
Reset: 00_H
Reset Value
00_H

PLDLEN
Payload Data Length Register
Offset
0AD_H
Reset Value
00_H
Data Sheet
275
V4.0, 2010-02-19