TDA5240 Datasheet, PDF (237/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TSI Pattern Data Reference B Register 0
TDA5240
Appendix
Register Description
A_TSIPTB0
TSI Pattern Data Reference B Register 0

Offset
053_H
76,37%
Z
Reset Value
00_H

Field
Bits
TSIPTB0
7:0
Type
w
Description
Data Pattern for TSI comparison: Bit 7...Bit 0(LSB) (in Chips)
Reset: 00_H
TSI Pattern Data Reference B Register 1
A_TSIPTB1
TSI Pattern Data Reference B Register 1

Offset
054_H
76,37%
Z
Reset Value
00_H

Field
Bits
TSIPTB1
7:0
Type
w
Description
Data Pattern for TSI comparison: Bit 15(MSB)...Bit 8 (in Chips)
Reset: 00_H
End Of Message Control Register
A_EOMC
End Of Message Control Register

8186('

Offset
055_H


5HV
Reset Value
05_H

(206</2
Z

(20&9
Z

(20'$7/
(1
Z
Data Sheet
237
V4.0, 2010-02-19