TDA5240 Datasheet, PDF (277/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
Field
Bits
UNUSED
7:3
ADCEOC
2
ADCRESL
1:0
Type
-
r
r
Description
UNUSED
Reset: 00_H
ADC End of Conversion detected
0_B not detected
1_B detected
Reset: 0_H
ADC Result Value ADCRES(9:0) = ADCRESH(7:0) & ADCRESL(1:0)
The 2 LSBs of the ADC result are captured when the SFR register
ADCRESH is readout.
Reset: 0_H
VCO Autocalibration Result Readout Register
VACRES
VCO Autocalibration Result Readout
Register


8186('

Offset
0B0_H


5HV
9$&5(6
U
Reset Value
00_H

Field
Bits
UNUSED
7:5
VACRES
3:0
Type
-
r
AFC Offset Read Register
Description
UNUSED
Reset: 0_H
VCO Autocalibration Result
Returns the VCO range selected by VCO Autocalibration
Reset: 0_H
AFCOFFSET
AFC Offset Read Register

Offset
0B1_H
$)&2))6
U
Reset Value
00_H

Data Sheet
277
V4.0, 2010-02-19