TDA5240 Datasheet, PDF (74/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Functional Description
2.5
System Interface
In most applications, the TDA5240 receiver IC is attached to an external microcontroller.
This so-called Application Controller executes a firmware which governs the TDA5240
by reading data from the receiver when data has been received on the RF channel and
by configuring the receiver device. The TDA5240 features an easy to use System
Interface, which is described in this chapter.
Transparent Mode
The TDA5240 supports two levels of integration. In the most elementary fashion, it
provides a rather rudimentary interface by which the incoming RF signal is demodulated
and the corresponding data is made available to the Application Controller. Optionally, a
chip clock is generated by the TDA5240. Since the data signal is always directly the
baseband representation of the RF signal, we call this mode the Transparent Mode. The
usage of the Transparent Mode will be described in Chapter 2.5.1.2.
Packet Oriented Mode
Alternatively, the TDA5240 features the so-called Packet Oriented Mode which supports
the autonomous reception of data telegrams. The Packet Oriented Mode provides a
high-level System Interface which greatly simplifies the integration of the receiver in
data-centric applications. In Packet Oriented Mode, the data interface is based on
chunks of synchronous data which are received in packets. In the easiest way, the
Application Controller only reacts on the synchronous data it receives. The receiver
autonomously handles the line decoding and the deframing of these data, and supports
the timed reception of packets. Data is buffered in a receive FIFO and can be read out
via the data interface. Further, the receiver provides support for the identification of
wake-up signals. Details on the usage of the Packet Oriented Mode of the receiver are
given in Chapter 2.5.1.2.
2.5.1 Interfacing to the TDA5240
The TDA5240 is interfacing with an application by three logical interfaces, see
Figure 44. The RF/IF interface handles the reception of RF signals and is responsible
for the demodulation. Its physical implementation has been described in Chapter 2.4.3
and Chapter 2.4.8, respectively. The other two logical interfaces establish the
connection to the Application Controller. Note that due to the high level of integration of
the receiver, these interfaces impose minor requirements on the Application Controller,
which can be as simple as an 8-bit microcontroller operated at low clock rate. As will be
shown later, the physical implementation of the data interface depends on whether the
receiver is operated in Packet Oriented or in Transparent Mode.
For the sake of clarity, the communication between the TDA5240 and the Application
Controller is split into control flow and data flow. This separation leads to an
independent definition of the data interface and the control interface, respectively.
Data Sheet
74
V4.0, 2010-02-19