TDA5240 Datasheet, PDF (209/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description


:8566,%+
Z
Field
Bits
WURSSIBH3 7:0
Type
w
Description
Wake Up on RSSI Blocking Level HIGH for Channel 3, when RSSI is
selected as WU criterion or FFB criterion.
In case of Signal Recognition as WU criterion or FFB criterion, the
register defines the minimum consecutive T/16 samples of the Signal
Recognition output to be at high level for a positive wake up event
generation or FFB generation
Reset: 00_H
Signal Detector Saturation Threshold Register
A_SIGDETSAT
Signal Detector Saturation Threshold
Register

Offset
024_H
6,*'(76$7
Z
Reset Value
10_H

Field
Bits
SIGDETSAT 7:0
Type
w
Description
Saturation threshold of the Sigdet peak detector used for zero-tube
threshold calculation.
Reset: 10_H
Wake-up on Level Observation Time Register
A_WULOT
Wake-up on Level Observation Time Register
Offset
025_H



:8/2736
Z
:8/27
Z
Reset Value
00_H

Data Sheet
209
V4.0, 2010-02-19