TDA5240 Datasheet, PDF (225/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
A_SIGDET1
Signal Detector Threshold Level Register -
Wakeup

Offset
040_H
6'7+5
Z
Field
Bits
Type Description
SDTHR
7:0
w
Signal Detector Threshold Level for Wakeup
Reset: 00_H
Signal Detector Threshold Low Level Register
Reset Value
00_H

A_SIGDETLO
Signal Detector Threshold Low Level
Register

Offset
041_H
6'/27+5
Z
Reset Value
00_H

Field
Bits
SDLOTHR 7:0
Type
w
Description
Signal Detector Threshold Low Level. This threshold level is
only valid, if the FSK Noise detector selection in the A_NDCONFIG
register is
set to 11b
Reset: 00_H
Signal Detector Range Selection Register
A_SIGDETSEL
Signal Detector Range Selection Register
Offset
042_H


5HV


6'56(/$6.
Z


6'56(/)6.
Z
Data Sheet
225
Reset Value
7F_H


6'/256(/
Z
V4.0, 2010-02-19