TDA5240 Datasheet, PDF (217/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
Field
Bits
UNUSED
7:6
AGCRESATC 5
C
Type
-
w
AGCFREEZE 4:2
w
AGCSTART 1:0
w
AGC Configuration Register 0
Description
UNUSED
Reset: 0_H
Enable AGC Restart at Channel Change and at the beginning of the
current configuration in Self Polling Mode
and at leaving the HOLD state (when bit CMC0.INITPLLHOLD is set) in
Run Mode Slave
0_B Disabled
1_B Enabled
Reset: 0_H
AGC Freeze Configuration
When selecting a Level criterion here,
please note to use the same Level criterion as for Wake-Up
000_B Stay ON
001_B Freeze on RSSI Event + Delay (AFCAGCDEL)
010_B Freeze on Signal Recognition Event + Delay (AFCAGCDEL)
011_B Freeze on Symbol Synchronization + Delay (AFCAGCDEL)
100_B SPI Command - write to EXTPCMD.AGCMANF bit
101_B n.u.
110_B n.u.
111_B n.u.
Reset: 0_H
AGC Start Configuration
When selecting a Level criterion here,
please note to use the same Level criterion as for Wake-Up
00_B OFF
01_B Direct ON
10_B Start on RSSI event
11_B Start on Signal Recognition event
Reset: 0_H
A_AGCCFG0
AGC Configuration Register 0


8186('
$*&'*&

Z
Offset
033_H



$*&+<6
Z
Field
Bits
UNUSED
7
Data Sheet
Type
-
Description
UNUSED
Reset: 0_H
217
Reset Value
2B_H


$*&*$,1
Z
V4.0, 2010-02-19