TDA5240 Datasheet, PDF (58/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Functional Description
8-Bit Extended Mode: As two correlators of up to 16 chips length each
working simultaneously in parallel, with matching information insertion
This bit is inserted at the beginning of the payload. “0” is inserted, when correlator A has
matched and “1” when correlator B has matched. The payload length for these two TSI
Pattern may be different.
x_TSILENA = 16d, x_TSILENB = 6d
RunIn
Incoming Pattern ^{0 0 0 0 0 1 0 1 0 1 0 0 1 0}
Manchester Coded
TSI Pattern B Match
FSYNC
Data into FIFO
0101010101100110011001011001
x_TSIPTB
543210
011001
11010010
Matching Information inserted
Figure 29 8-Bit Extended TSI Mode
8-Bit Gap Mode: As two sequentially working correlators of up to 16 chips
length each
This mode is only used in combination with the TSI Gap Mode shown below!
This mode is used to define a gap between the two patterns which is preset in the
x_TSIGAP register. To identify exactly the beginning of the gap it would be helpful on
occasion to place the first CV of the gap into the TSI Pattern A. In this case, the gap
length needed for the x_TSIGAP register must be shortened and the x_TVWIN length
must be extended.
x_TSILENA = 8d, x_TSILENB = 12d
TSIGRSYN = 1
RunIn
Gap RunIn
Incoming Pattern ^{0 0 0 0 0 1 0 S}
000010001111101
Manchester Coded
TSI Pattern Match
FSYNC
Data into FIFO
01010101011001000000010101011001010110101010100110
x_TSIPTA
76543210
01100100
x_TSIPTB
1110 9 8 7 6 5 4 3 2 1 0
100101011010
11101
Figure 30 8-Bit Gap TSI Mode
Data Sheet
58
V4.0, 2010-02-19