TDA5240 Datasheet, PDF(191/284 Page) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5240 Datasheet, PDF (191/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

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TDA5240

Appendix

Register Overview

Table 2 Register Overview and Reset Value (contâd)

Register Short Name Register Long Name

Offset Address

D_PKBITPOS

D_ISUPFCSEL

D_PDECF

D_PDECSCFSK

D_PDECSCASK

D_MFC

D_SRC

D_EXTSLC

D_SIGDET0

RSSI Peak Detector Bit Position Register

Image Supression Fc Selection Register

Pre Decimation Factor Register

Pre Decimation Scaling Register FSK Mode

Pre Decimation Scaling Register ASK Mode

Matched Filter Control Register

Sampe Rate Converter NCO Tune

Externel Data Slicer Configuration

Signal Detector Threshold Level Register - Run

Mode

337H

338H

339H

33AH

33BH

33CH

33DH

33EH

33FH

D_SIGDET1

Signal Detector Threshold Level Register -

Wakeup

340H

D_SIGDETLO

D_SIGDETSEL

D_SIGDETCFG

D_NDTHRES

D_NDCONFIG

D_CDRP

Signal Detector Threshold Low Level Register

Signal Detector Range Selection Register

Signal Detector Configuration Register

FSK Noise Detector Threshold Register

FSK Noise Detector Configuration Register

Clock and Data Recovery P Configuration

Register

341H

342H

343H

344H

345H

346H

D_CDRI

D_CDRRI

Clock and Data Recovery Configuration Register

Clock and Data Recovery RUNIN Configuration

Register

347H

348H

D_CDRTOLC

D_CDRTOLB

D_TVWIN

D_SLCCFG

D_TSIMODE

D_TSILENA

D_TSILENB

D_TSIGAP

D_TSIPTA0

D_TSIPTA1

D_TSIPTB0

D_TSIPTB1

D_EOMC

D_EOMDLEN

D_EOMDLENP

D_CHCFG

D_PLLINTC1

CDR DC Chip Tolerance Register

CDR DC Bit Tolerance Register

Timing Violation Window Register

Slicer Configuration Register

TSI Detection Mode Register

TSI Length Register A

TSI Length Register B

TSI Gap Length Register

TSI Pattern Data Reference A Register 0

TSI Pattern Data Reference A Register 1

TSI Pattern Data Reference B Register 0

TSI Pattern Data Reference B Register 1

End Of Message Control Register

EOM Data Length Limit Register

EOM Data Length Limit Parallel Mode Register

Channel Configuration Register

PLL MMD Integer Value Register Channel 1

349H

34AH

34BH

34CH

34DH

34EH

34FH

350H

351H

352H

353H

354H

355H

356H

357H

358H

359H

Reset Value

00H

07H

00H

00H

20H

07H

00H

02H

00H

00H

00H

7FH

00H

00H

07H

E6H

65H

01H

0CH

1EH

28H

90H

80H

00H

00H

00H

00H

00H

00H

00H

05H

00H

00H

04H

93H

Data Sheet

191

V4.0, 2010-02-19

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