TDA5240 Datasheet, PDF (210/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

TDA5240
Appendix
Register Description
Field
Bits
WULOTPS 7:5
WULOT
4:0
Type
w
w
Description
Wake-Up Level Observation Time PreScaler
000_B 4
001_B 8
010_B 16
011_B 32
100_B 64
101_B 128
110_B 256
111_B 512
Reset: 0_H
Wake-Up Level Observation Time
Min. 01h : Twulot = 1 * WULOTPS * 64 / Fsys
Max 1Fh : Twulot = 31 * WULOTPS * 64 / Fsys
Value 00h : Twulot = 32 * WULOTPS * 64 / Fsys
Reset: 00_H
Synchronization Search Time-Out Register
A_SYSRCTO
Synchronization Search Time-Out Register
Offset
026_H

6<65&72
Z
Field
Bits
SYSRCTO 7:0
Type
w
SYNC Timeout Timer Register
Description
Synchronization search time out
FFh: 15 15/16 bit
00h: 0 bit
Reset: 87_H
Reset Value
87_H

A_TOTIM_SYNC
SYNC Timeout Timer Register

Data Sheet
Offset
027_H
727,06<1&
Z
210
Reset Value
FF_H

V4.0, 2010-02-19