TDA5240 Datasheet, PDF (215/284 Pages) Infineon Technologies AG – Enhanced Sensitivity Multi-Channel Quad-Configuration Receiver

AFC Integrator 2 Gain Register 0
TDA5240
Appendix
Register Description
A_AFCK2CFG0
AFC Integrator 2 Gain Register 0

Offset
02F_H
$)&.B
Z
Reset Value
00_H

Field
Bits
AFCK2_0
7:0
Type
w
AFC Integrator 2 Gain Register 1
Description
AFC Filter coefficient K2, AFCK2(11:0) = AFCK2_1(MSB) &
AFCK2_0(LSB)
Reset: 00_H
A_AFCK2CFG1
AFC Integrator 2 Gain Register 1

8186('

Offset
030_H


$)&.B
Z
Reset Value
00_H

Field
Bits
UNUSED
7:4
AFCK2_1
3:0
Type
-
w
Description
UNUSED
Reset: 0_H
AFC Filter coefficient K2, AFCK2(11:0) = AFCK2_1(MSB) &
AFCK2_0(LSB)
Reset: 0_H
Peak Memory Filter Up-Down Factor Register
A_PMFUDSF
Peak Memory Filter Up-Down Factor Register
Offset
031_H
Reset Value
42_H
Data Sheet
215
V4.0, 2010-02-19