Z32F0641MCU Datasheet, PDF (90/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
Functional Description
Direct Memory Access Controller
The DMA controller performs direct memory transfer by sharing the system bus with the CPU core. The
system bus is shared by 2 AHB masters following the round-robin priority strategy. Therefore, the DMA
controller can share half of the system bandwidth.
The DMA controller is triggered only with a peripheral request. When a peripheral requests the transfer to the
DMA controller, the associated channel is activated and accesses the bus to transfer the requested data from
memory to the peripheral data buffer or from the peripheral data buffer to memory space.
1. User sets the peripheral address and memory address.
2. User configures DMA operation mode and transfer count.
3. User enables the DMA channel.
4. Peripheral sends a DMA request.
5. DMA activates the channel that was requested.
6. DMA reads data from the source address and saves it to the internal buffer.
7. DMA writes the buffered data to the destination address.
8. Transfer count number is decreased by 1.
9. When Transfer count is 0, the EOT flag is set and a notice sent to peripheral to issue the interrupt.
10. DMA does not have an interrupt source; the interrupt related DMA status can be shown from the
assigned peripheral interrupt.
Figure 9.2. Block Diagram
Figure 9.2 shows the functional timing diagram of the DMA controller. The transfer request from the peripheral
is pended internally and it invokes source data read transfer on the AHB bus. The read data from the source
address is stored in the internal buffer. This data will then be transferred to the destination address when the
AHB bus is available.
The timing diagram for a DMA transfer from the peripheral to memory is shown in Figure 9.3. A 4-clock cycle
latency exists when accessing the peripheral. If the bus is occupied by a different bus master, the number of
bus waiting cycles increase until the bus is available.
PS034404-0417
PRELIMINARY
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