Z32F0641MCU Datasheet, PDF (68/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
Port Control Unit
PCn.ICR PORT n Interrupt Control Register
This is the Interrupt Mode control register.
PCA.ICR=0x4000_1018, PCB.ICR=0x4000_1118
PCC.ICR=0x4000_1218, PCD.ICR=0x4000_1318
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PIC15 PIC14 PIC13 PIC12 PIC11 PIC10 PIC9 PIC8 PIC7 PIC6 PIC5 PIC4 PIC3 PIC2 PIC1 PIC0
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
PICn
Pin interrupt mode
00 Prohibit external interrupt
01 Low level interrupt or Falling edge interrupt mode
10 High level interrupt or rising edge interrupt mode
11 Both of rising and falling edge interrupt mode.
Not support for level trigger mode
PORTEN Port Access Enable
Port Access Enable provides register writing permission for all PCU registers.
PORTEN=0x4000_1FF0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
PORTEN
--
WO
7
PORTEN
0
Writing the sequence of 0x15 and 0x51 in this register
enables writing to PCU registers, and writing other valu
es protects all PCU registers from writing.
PS034404-0417
PRELIMINARY
65