Z32F0641MCU Datasheet, PDF (106/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
16-Bit Timer
Figure 11.4. One Shot Mode Operation
The period of one shot count can be calculated as shown in the following equation:
The period = TMCLK Period * Tn.GRB value
Match A interrupt time = TMCLK Period * Tn.GRA value
If Tn.GRB = 0, the timer cannot be started even if TnCR2.TEN is “1” because the period is “0”.
The value in Tn.GRA and Tn.GRB is loaded into the internal compare data buffer 0 and 1 when the loading
condition occurs. In this periodic mode with TnCR1.UAO =0, the Tn.CR2.TCLR write operation and the GRB
match event will load the compare data buffers.
When TnCR1.UAO is 1, the internal compare data buffer is updated whenever the Tn.GRA or Tn.GRB data is
updated.
The TnIO output signal format is the same as PWM mode. Tn.GRB value defines the output pulse period and
the Tn.GRA value defines the pulse width of one shot pulse.
PWM Timer Output
Figure 11.5 shows the timing diagram in PWM output mode. The Tn.GRB value decides the PWM pulse
period. An additional comparison point is provided by the Tn.GRA register value which defines the pulse width
of PWM output.
PS034404-0417
PRELIMINARY
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