Z32F0641MCU Datasheet, PDF (81/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
FM.CFG Flash Memory Config Value Register
The Flash Memory Config Value Register is the Flash configuration register.
Flash Memory Controller
FM.CFG=0x4000_0130
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
WRITE KEY
TRIM
0 0000000000000001
0
01100
0
RW
31 WRITE KEY
KEY Value : 0x7858
15
15 HRESPD
Disable HRESP(error response function) of Data or
System bus
(HRESP is AMBA AHB signal)
12 TMRCK
0 PGM/ERASE timer source is 1MHz RINGOSC
PRM/ERASE timer source is External Clock
10 WAIT
000 No wait access for flash memory
8
001 1-wait inserted for flash access
010 2-wait inserted for flash access
011 3-wait inserted for flash access
7
CRCINIT
0 CRC register winll be initialized. It should be reset
1
again before read flash to generate CRC16 calculation
(Initial value of FMCRC is 0xFFFF)
6
CRCEN
0 CRC16 enable
1 CRC value will be calculated at every flash read timing
3
TRIM
FLASH TRIM Value (trim_mode_entry)
0
FM.BOOTCR Boot ROM Remap Clear Register
This is the Boot ROM remap clear register. This register is an 8-bit register.
FM.BOOTCR=0x4000_0174
7
6
5
4
3
2
1
0
BOOTROM
0
0
0
0
0
0
0
1
R
0
BOOTROM
Boot Mode (only can be written in boot loader mode)
This bit is used to clear boot loader mode at end of
boot code (when BOOTROM low, external BOOT pin si
gnal is masked)
PS034404-0417
PRELIMINARY
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