Z32F0641MCU Datasheet, PDF (54/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
System Control Unit
MCCR2 Miscellaneous Clock Control Register 2
The Miscellaneous Clock Control register 2 controls the optional configuration of MPWM0 clocks.
MCCR2=0x4000_0094
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
000000000000000000000
000
RW
10 PWM0CSEL
8
7
PWM0DIV
0
PWM0 Clock source select bit
0xx RING OSC 1Mhz
100 MCLK (bus clock)
101 Reserved
110 External Main OSC (XTAL)
111 Reserved
PWM0 Clock N divider
0x00
RW
MCCR3 Miscellaneous Clock Control Register 3
The Miscellaneous Clock Control register 3 controls the configuration for the Timer EXT0 and WDT clocks.
MCCR3=0x4000_0098
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00000
000
RW
0x01
RW
26 TEXT0CSEL
24
23 TEXT0DIV
16
10 WDTCSEL
8
7
WDTDIV
0
00000
000
RW
Timer EXT0 Clock source select bit
0xx RING OSC 1Mhz
100 MCLK (bus clock)
101 Reserved
110 External Main OSC (XTAL)
111 Reserved
Timer EXT0 Clock N divider
WDT Clock source select bit
0xx RING OSC 1Mhz
100 MCLK (bus clock)
101 Reserved
110 External Main OSC (XTAL)
111 Reserved
WDT Clock N divider
0x01
RW
PS034404-0417
PRELIMINARY
51