Z32F0641MCU Datasheet, PDF (39/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
System Control Unit
PER2 Peripheral Enable Register 2
Prior to using a peripheral unit, it requires to be activated by writing 1 to the corresponding bit in the
PER1/PER2 register. Until activation, the peripheral stays in Reset state.
To disable the peripheral unit, write 0 to the corresponding bit in the PER0/PER1 register, after which the
peripheral enters the Reset state.
PER2=0x4000_002C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00000000000000000000000100000001
21 ADC1
20 ADC0
16 MPWM0
9
UART1
8
UART0
4
I2C0
0
SPI0
ADC1 function enable
ADC0 function enable
MPWM0 function enable
UART1 function enable
UART0 function enable
I²C0 function enable
SPI0 function enable
PS034404-0417
PRELIMINARY
36