Z32F0641MCU Datasheet, PDF (10/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
Overview
 Built-in timer also supports counter-synchronization mode which can generate synchronized
waves and timing
Motor PWM Generator
 3-phase Motor PWM Generator is implemented. 16-bit up/down counter with prescaler supports
triangular and saw tooth waveforms
 PWM has the ability to generate internal ADC trigger signals to measure the signal on time
 Dead time insertion and emergency stop functionality provide overcurrent protection for the chip
and system
Serial Peripheral Interface (SPI)
 The Serial Peripheral Interface (SPI) block provides synchronous serial communication. The
Z32F0641 MCU has 1 channel SPI module which includes the DMA function supported by a DMA
controller. Transfer data is moved to/from the memory area without CPU operation
 Boot Mode uses this SPI block to download the Flash program
Inter-Integrated Circuit Interface
 The Z32F0641 MCU has 1 channel Inter-Integrated Circuit (I²C) block which supports up to 400
kHz I²C communication. Master and slave modes are supported
Universal Asynchronous Receiver/Transmitter
 The Z32F0641 MCU has 2 channels Universal Asynchronous Receiver/Transmitter (UART) block.
For accurate baud rate control, the fractional baud rate generator is provided
 The UART features the DMA function, supported by a DMA controller. Transfer data is moved
to/from the memory area without CPU operation
General PORT I/Os
 16-bit PA, PB, PC, and PD ports are available and provide multiple functionality:
o General I/O port
o Independent bit set/clear function
o External interrupt input port
 Programmable pull-up and open-drain selection
 On-chip input debounce filter
12-bit Analog-to-Digital Converter (ADC)
 2 built-in Analog-to-Digital Converters (ADC) can convert analog signals up to 1.5 Msps
conversion rate. 11-channel analog MUX provides various combinations from external analog
signals.
 The ADC features the DMA function, supported by a DMA controller. Transfer data is moved
to/from the memory area without CPU operation.
PS034404-0417
PRELIMINARY
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