Z32F0641MCU Datasheet, PDF (100/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
16-Bit Timer
Tn.CR2 Timer Control Register 2
The Timer Control Register 2 is an 8-bit register.
7
6
5
4
0
0
0
0
R
R
R
R
T0.CR2=0x4000_3004, T1.CR2=0x4000_3024
T2.CR2=0x4000_3044, T3.CR2=0x4000_3064
T8.CR2=0x4000_3104, T9.CR2=0x4000_3124
3
2
1
0
TCLR
TEN
0
0
0
0
R
R
WO
RW
1
TCLR
0
TEN
Timer register clear
0 Normal operation
1 Clear count register.
(This bit will be cleared after next timer clock)
Timer enable bit
0 Stop timer counting
1 Start timer counting
Note: It is recommended that the timer is started with TCLR bit setting at 1.
Tn.PRS Timer n Prescaler Register
The Timer Prescaler Register is a 16-bit register designed to prescale the counter input clock.
T0.PRS=0x4000_3008, T1.PRS=0x4000_3028
T2.PRS =0x4000_3048, T3.PRS=0x4000_3068
T8.PRS=0x4000_3108, T9.PRS=0x4000_3128
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PRS
0
0
0
0
0
0
000
RW
9
PRS
0
Pre-scale value of count clock
TCLK = CLOCK_IN/(PRS+1)
(CLOCK_IN is a selected timer input clock)
PS034404-0417
PRELIMINARY
97