Z32F0641MCU Datasheet, PDF (112/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
UART
12. UART
Overview
2-Channel Universal Asynchronous Receiver/Transmitter (UART) modules are included. Dedicated DMA
support to transfer data between the Memory buffer and the Transmit/Receive buffer of the UART block is
also provided.
The UART operation status, including error status, can be read from the status register. The prescaler, which
generates proper baud rate, exists for each UART channel. This prescaler divides the UART clock source
which is PCLK/2, from 1 to 65535. The baud rate is generated using the clock with a prescaler of 16, and an
8-bit precision clock tuning function.
Programmable interrupt generation function helps control communication via the UART channel. Features of
the UART include:
 Compatible with 16450 UART
 Supports DMA transfer
 Standard asynchronous control bit (start, stop, and parity) configurable
 Programmable 16-bit fractional baud rate generator
 Programmable serial communication
o 5-, 6-, 7- or 8- bit data transfer
o Even, odd, or no-parity bit insertion and detection
o 1-, 1.5- or 2-stop bit-insertion and detection
 16-bit baud rate generation with 8-bit fraction control
 Hardware inter-frame delay function
 Stop bit error detection
 Detail status register
 Loop-back control
PS034404-0417
PRELIMINARY
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