Z32F0641MCU Datasheet, PDF (168/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
Motor Pulse Width Modulator
MP0.PSR MPWM Protection 0,1 Status Register
The PWM Protection Status register is a 16-bit register. This register indicates which outputs are disabled.
Users can set the output masks manually.
When writing a value, if PROTKEY is not written, the written values are ignored.
MP0.PSR0=0x4000_4044,MP0.PSR1=0x4000_404C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PROTKEY
-
0
0
0
0
0
0
0
WO
RC
RW RW RW RW RW RW
15 PROTKEY
8
7
PROTIF
5
WHPROT
4
VHPROT
3
UHPROT
2
WLPROT
1
VLPROT
0
ULPROT
Protection Clear Access Key
To clear flags, write the key with protection flag
(PSR0 key is 0xCA and PSR1 key is 0xAC)
Writing without PROTKEY prohibited.
Protection Interrupt status
0 No Protection Interrupt
1 Protection Interrupt occurred
Activate W-phase H-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
Activate V-phase H-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
Activate U-phase H-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
Activate W-phase L-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
Activate V-phase L-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
Activate U-phase L-side protection flag
0 Protection not occurred.
1 Protection occurred or protection output enabled
If the PROTEN bit in MP.PCR register is enabled, on any asserting signal on the external protection pins, the
PWM output is prohibited with output values defined in MP.FOLR register. Additionally, users can prohibit the
output manually by writing the designated value into the MP.PSR register.
PS034404-0417
PRELIMINARY
165