Z32F0641MCU Datasheet, PDF (30/205 Pages) Zilog, Inc. – High Performance low-power Cortex-M3 core

Z32F0641 Product Specification
System Control Unit
CIDR Chip ID Register
The CHIP ID Register shows chip identification information. This register is a 32-bit read-only register.
CIDR=0x4000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CHIPID
0xAC33_4064
RO
31 CHIPID
0
Device ID
0xAC33_4064
CIDR=0x4000_000C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CHIPID2
0x0000_0000
RO
31 CHIPID2
0
Revision ID
0x0000_0000
SMR System Mode Register
The current operating mode is shown in this SCU mode register.The operating mode can be changed by
writing a new mode in this register. The previous operating mode will be saved in this register after a reset
event. The System Mode Register is a 16-bit register.
SMR=0x4000_0004
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
00
0
0
0
0
R
5
PREVMODE
4
Previous operating mode before current reset event.
00 Previous operating mode was RUN mode
01 Previous operating mode was SLEEP mode
10 Previous operating mode was PowerDown mode
11 Previous operating mode was INIT mode
PS034404-0417
PRELIMINARY
27