SH7146 Datasheet, PDF (999/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Item
Page Revision (See Manual for Details)
9.5.7 Others
232
9.5.8 Access to On-Chip FLASH 233
and On-Chip RAM by CPU to
to
9.5.10 Access to External Memory 237
by CPU
Table 10.28 TIORU_5, TIORV_5, 275
and TIORW_5 (Channel 5)
Deleted
(2) Access in View of LSI Internal Bus Master
…….
(3) On-Chip Peripheral Module Access
Added
Amended
Description
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIC5U, TIC5V, and TIC5W Pin
IOC4 IOC3 IOC2 IOC1 IOC0 Function
1
1
0
0
1
Measurement of low pulse width of
external input signal
Capture at trough of complementary
PWM mode
1
0
Measurement of low pulse width of
external input signal
Capture at crest of complementary
PWM mode
1
Measurement of low pulse width of
external input signal
Capture at crest and trough of
complementary PWM mode
1
0
0
Setting prohibited
1
Measurement of high pulse width of
external input signal
Capture at trough of complementary
PWM mode
1
0
Measurement of high pulse width of
external input signal
Capture at crest of complementary
PWM mode
1
Measurement of high pulse width of
external input signal
Capture at crest and trough of
complementary PWM mode
Rev. 3.00 May 17, 2007 Page 955 of 974
REJ09B0229-0300