SH7146 Datasheet, PDF (510/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Operation when Error Occurs during PWM Mode 1 Operation, and Operation is Restarted
in Reset-Synchronized PWM Mode: Figure 10.147 shows an explanatory diagram of the case
where an error occurs in PWM mode 1 and operation is restarted in reset-synchronized PWM
mode after re-setting.
MTU2 module output
1
2
3
4
5
6
RESET TMDR TOER TIOR PFC TSTR
(PWM1) (1) (1 init (MTU2) (1)
0 out)
7
8
9
10 11 12 13 14 15 16 17 18 19
Match Error PFC TSTR TMDR TIOR TIOR TOER TOCR TMDR TOER PFC TSTR
occurs (PORT) (0) (normal) (0 init(disabled) (0)
(RPWM) (1) (MTU2) (1)
0 out)
TIOC3A
TIOC3B
Not initialized (TIOC3B)
TIOC3D
Not initialized (TIOC3D)
Port output
PE8
High-Z
PE9
High-Z
PE11
High-Z
Figure 10.147 Error Occurrence in PWM Mode 1,
Recovery in Reset-Synchronized PWM Mode
1 to 14 are the same as in figure 10.146.
15. Select the reset-synchronized PWM output level and cyclic output enabling/disabling with
TOCR.
16. Set reset-synchronized PWM.
17. Enable channel 3 and 4 output with TOER.
18. Set MTU2 output with the PFC.
19. Operation is restarted by TSTR.
Rev. 3.00 May 17, 2007 Page 466 of 974
REJ09B0229-0300