SH7146 Datasheet, PDF (246/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Table 9.2 Address Map (Single-Chip Mode)
Address
Area
Memory Type
Capacity
Bus
Width
H'00000000 to On-chip ROM
H'0003FFFF
256 kbytes 32 bits
H'00040000 to Reserved
H'FFFF8FFF
H'FFFF9000 to On-chip RAM
H'FFFFAFFF
8 kbytes
32 bits
H'FFFFB000 to Reserved
H'FFFFBFFF
H'FFFFC000 to On-chip peripheral
H'FFFFFFFF ^modules
16 kbytes
8 or 16
bits
Note: Do not access the reserved area. If the reserved area is accessed, the correct operation
cannot be guaranteed. Only the on-chip ROM, on-chip RAM, and on-chip peripheral
modules can be accessed; the other areas cannot be accessed.
Rev. 3.00 May 17, 2007 Page 202 of 974
REJ09B0229-0300