SH7146 Datasheet, PDF (16/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

10.7.3 Caution on Period Setting ..................................................................................... 437
10.7.4 Contention between TCNT Write and Clear Operations...................................... 437
10.7.5 Contention between TCNT Write and Increment Operations............................... 438
10.7.6 Contention between TGR Write and Compare Match.......................................... 439
10.7.7 Contention between Buffer Register Write and Compare Match ......................... 440
10.7.8 Contention between Buffer Register Write and TCNT Clear ............................... 441
10.7.9 Contention between TGR Read and Input Capture............................................... 442
10.7.10 Contention between TGR Write and Input Capture.............................................. 443
10.7.11 Contention between Buffer Register Write and Input Capture ............................. 444
10.7.12 TCNT_2 Write and Overflow/Underflow Contention in Cascade Connection .... 444
10.7.13 Counter Value during Complementary PWM Mode Stop .................................... 446
10.7.14 Buffer Operation Setting in Complementary PWM Mode ................................... 446
10.7.15 Reset Sync PWM Mode Buffer Operation and Compare Match Flag .................. 447
10.7.16 Overflow Flags in Reset Synchronous PWM Mode ............................................. 448
10.7.17 Contention between Overflow/Underflow and Counter Clearing......................... 449
10.7.18 Contention between TCNT Write and Overflow/Underflow................................ 450
10.7.19 Cautions on Transition from Normal Operation or PWM Mode 1
to Reset-Synchronized PWM Mode ..................................................................... 450
10.7.20 Output Level in Complementary PWM Mode
and Reset-Synchronized PWM Mode................................................................... 451
10.7.21 Interrupts in Module Standby Mode ..................................................................... 451
10.7.22 Simultaneous Capture of TCNT_1 and TCNT_2 in Cascade Connection............ 451
10.8 MTU2 Output Pin Initialization......................................................................................... 452
10.8.1 Operating Modes .................................................................................................. 452
10.8.2 Reset Start Operation ............................................................................................ 452
10.8.3 Operation in Case of Re-Setting Due to Error During Operation, etc. ................. 453
10.8.4 Overview of Initialization Procedures and Mode Transitions
in Case of Error during Operation, etc.................................................................. 454
Section 11 Multi-Function Timer Pulse Unit 2S (MTU2S) .............................. 485
11.1 Input/Output Pins............................................................................................................... 489
11.2 Register Descriptions......................................................................................................... 490
Section 12 Port Output Enable (POE) ............................................................... 493
12.1 Features.............................................................................................................................. 493
12.2 Input/Output Pins............................................................................................................... 495
12.3 Register Descriptions......................................................................................................... 497
12.3.1 Input Level Control/Status Register 1 (ICSR1) .................................................... 498
12.3.2 Output Level Control/Status Register 1 (OCSR1) ................................................ 502
12.3.3 Input Level Control/Status Register 2 (ICSR2) .................................................... 503
Rev. 3.00 May 17, 2007 Page xvi of xliv