SH7146 Datasheet, PDF (760/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 18 I/O Ports
• PBDRL (SH7149)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
PB5 PB4 PB3 PB2 PB1 PB0
DR DR DR DR DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 6 —
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
5
PB5DR 0
R/W See table 18.4.
4
PB4DR 0
R/W
3
PB3DR 0
R/W
2
PB2DR 0
R/W
1
PB1DR 0
R/W
0
PB0DR 0
R/W
Table 18.4 Port B Data Register (PBDR) Read/Write Operations
• PBDRH Bits 2 to 0 and PBDRL Bits 9 to 0
PBIOR Pin Function Read
Write
0
General input Pin state
Can write to PBDRH and PBDRL, but it has no
effect on pin state
Other than
general input
Pin state
Can write to PBDRH and PBDRL, but it has no
effect on pin state
1
General output PBDRH or
Value written is output from pin
PBDRL value
Other than
PBDRH or
Can write to PBDRH and PBDRL, but it has no
general output PBDRL value effect on pin state
Rev. 3.00 May 17, 2007 Page 716 of 974
REJ09B0229-0300