SH7146 Datasheet, PDF (764/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 18 I/O Ports
18.3.1 Register Descriptions
Port D is a 16-bit input/output port. Note that port D is not available in the SH7146. Port D has the
following registers. For details on register addresses and register states during each processing,
refer to section 23, List of Registers.
Table 18.5 Register Configuration
Register Name
Port D data register L
Port D port register L
Abbrevia-
tion
R/W Initial Value Address
Access Size
PDDRL
R/W H'0000
H'FFFFD282 8, 16
PDPRL
R
H'xxxx
H'FFFFD29E 8, 16
18.3.2 Port D Data Register L (PDDRL)
The port D data register L (PDDRL) is a 16-bit readable/writable register that stores port D data.
Bits PD15DR to PD0DR correspond to pins PD15 to PD0 (multiplexed functions omitted here).
When a pin function is general output, if a value is written to PDDRL, that value is output directly
from the pin, and if PDDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PDDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PDDRL, although that value is written into PDDRL, it
does not affect the pin state. Table 18.6 summarizes port D data register read/write operations.
Bit: 15
PD15
DR
Initial value: 0
R/W: R/W
14
PD14
DR
0
R/W
13
PD13
DR
0
R/W
12
PD12
DR
0
R/W
11
PD11
DR
0
R/W
10
PD10
DR
0
R/W
9
PD9
DR
0
R/W
8
PD8
DR
0
R/W
7
PD7
DR
0
R/W
6
PD6
DR
0
R/W
5
PD5
DR
0
R/W
4
PD4
DR
0
R/W
3
PD3
DR
0
R/W
2
PD2
DR
0
R/W
1
PD1
DR
0
R/W
0
PD0
DR
0
R/W
Rev. 3.00 May 17, 2007 Page 720 of 974
REJ09B0229-0300