SH7146 Datasheet, PDF (1008/1022 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Item
19.5.2 User Program Mode
19.8.3 Other Notes
Page Revision (See Manual for Details)
776 Added
(2) Programming Procedure in User Program Mode
…. Specify 1/4 (initial value) as the frequency division
ratios of an internal clock (Iφ), a bus clock (Bφ), and a
peripheral clock (Pφ) through the frequency control
register (FRQCR).
After the programming/erasing program has been
downloaded and the SCO bit is cleared to 0, the setting
of the frequency control register (FRQCR) can be
changed to the desired value.
781 Added
(3) Erasing Procedure in User Program Mode
The frequency division ratio of an internal clock (Iφ), a
bus clock (Bφ), and a peripheral clock (Pφ) is specified
as ×1/4 (initial value) by the frequency control register
(FRQCR).
After the programming/erasing program has been
downloaded and the SCO bit is cleared to 0, the setting
of the frequency control register (FRQCR) can be
changed to the desired value.
783 Deleted
(4) Erasing/writing Procedure in User Program Mode
798 Amended
1. Download time of on-chip program
The programming program that includes the
initialization routine and the erasing program that
includes the initialization routine are each 3 kbytes
or less. Accordingly, when the CPU clock frequency
is 20 MHz, the download for each program takes
approximately 10 ms at maximum.
799 Added
5. Note on programming the product having a 256-
Kbyte user MAT
If an attempt is made to program the product having
a 256-Kbyte user MAT with more than 256 Kbytes,
data programmed after the first 256 Kbytes are not
guaranteed.
Rev. 3.00 May 17, 2007 Page 964 of 974
REJ09B0229-0300